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Compact Modeling of Hysteresis in Organic Thin-Film Transistors
  • +3
  • A Romero,
  • J A Jiménez-Tejada,
  • Rodrigo Picos,
  • D Lara,
  • J B Roldán,
  • M J Deen
A Romero
Departamento de Electrónica y Tecnología de Computadores, CITIC-UGR, Universidad de Granada
J A Jiménez-Tejada
Departamento de Electrónica y Tecnología de Computadores, CITIC-UGR, Universidad de Granada
Rodrigo Picos
Department of Industrial Engineering and Construction, Universitat de les Illes Balears

Corresponding Author:[email protected]

Author Profile
D Lara
Departamento de Electrónica y Tecnología de Computadores, CITIC-UGR, Universidad de Granada
J B Roldán
Departamento de Electrónica y Tecnología de Computadores, CITIC-UGR, Universidad de Granada
M J Deen
Department of Electrical and Computer Engineering, McMaster University

Abstract

In this work, we propose a model that describes the temporal evolution of the threshold voltage and trapped charge density in Thin-Film Transistors (TFTs) under dynamic conditions, paving the way for the characterization of memory transistors. The model is expressed as a first order differential equation for the trapped charge density, which is controlled by a time constant and an independent term proportional to the drain current. The time dependent threshold voltage is introduced in a previously developed compact model for TFTs with special consideration to the contact effects. The combination of both models and the use of an evolutionary parameter extraction procedure allow for reproducing the experimental dynamic behavior of TFTs. The results of the model and the evolutionary procedure have been validated with published experimental data of pentacene-based transistors. The procedure is able to simultaneously reproduce three kinds of experiments with different initialization routines and constraints in each of them: output and transfer characteristics with hysteresis and current transients characteristics.
19 Feb 2024Submitted to TechRxiv
20 Feb 2024Published in TechRxiv