The
total input-referred offset (3std+mean) of the comparator which is
performed by 1000 runs of Monte Carlo simulation, is shown in Figure 3.
The total offset voltage is less than 6.2mV within entire common-mode
rang. The offset fluctuation within common-mode range is about 2mV.
However, for limited range offset fluctuation is decreased. For
instance, for \(V_{CM,in}=\left(100-550\right)\text{mV}\) offset
fluctuation is less than 0.6mV.
The delay of the comparator which calculated at\(\left|\text{Out}_{+}-\text{Out}_{-}\right|=0.5\ \text{Vdd}\) is
shown in Figure 4 for different input common mode voltages and
ΔVin=10mV. The results corroborate that maximum delay occurs at\(V_{CM,in}=0.5Vdd\) where input transistors (\(M_{1-4}\)) are
partially turned on.