Time-division-multiplexing clocked-analog low dropout regulator (TDM CLDO) is a new multi-channel LDO architecture that is able to reduce the total chip area by analog hardware multiplexing. It is particularly suitable for thermo-optic tuning in silicon photonics that has a low tuning power and requires a small power supply chip area. However, previous designs require a dedicated compensation capacitor for each channel. This is because, during controller switching, one node of the compensation capacitor experiences large voltage changes that prevent reliable multiplexing of the capacitor. Multiplexing the compensation capacitor is required to further reduce chip area. This paper presents a four-channel TDM CLDO using a novel Current Miller compensation with a Degenerated Resistor (CMDR) block. This CDMR block is disconnected from voltage nodes with large changes, therefore enabling reliable capacitor multiplexing. In addition, Gray-code addressing technique is adopted to reduce the crosstalk between four channels caused by clock timing errors. Implemented in a 65 nm CMOS process, this design has a total chip area of 0.0047 mm2, which is 55% smaller than the conventional solution with four identical LDOs and consumes a quiescent current of 3.1 uA per channel. Measured results show that the presented four-channel TDM CLDO can simultaneously track four 1 Vpp sinusoidal signals up to 200 kHz.
